using System;
using XFESystem.NativeKernel;

// Pure geometry checks against the actual production method, with no Initialize,
// native import or MMIO invocation. These records are explicit test fixtures.
public static unsafe class ProbeGeometryChecks
{
    static NativeGpuDeviceDiscovery Valid()
    {
        return new NativeGpuDeviceDiscovery {
            AbiVersion = 1, RecordBytes = (uint)sizeof(NativeGpuDeviceDiscovery),
            VendorId = 0x10de, DeviceId = 0x2b85, ClassCode = 0x030000,
            Bus = 1, Command = 2, CapabilityStatus = 1, PcieCapabilityOffset = 0x40, Flags = 1,
            Bar0 = new NativeGpuBarDiscovery { Index = 0, Address = 0x90000000, Size = 0x1000000,
                Flags = GpuHardwareBridge.Memory | GpuHardwareBridge.SizeKnown, SizeSource = 2 }
        };
    }
    static void Accept(string name, NativeBootInfo* boot, NativeGpuDeviceDiscovery* record, ulong expected)
    {
        ulong page = 123;
        Program.Check(name, NvidiaBootProbe.TryRegisterPage(boot, record, &page) && page == expected);
    }
    static void Deny(string name, NativeBootInfo* boot, NativeGpuDeviceDiscovery* record)
    {
        ulong page = 123;
        Program.Check(name, !NvidiaBootProbe.TryRegisterPage(boot, record, &page) && page == 0);
    }
    public static void Run()
    {
        MemoryMapEntry entry = new() { Base = 0x80000000, Length = 0x40000000, Kind = 1 };
        MemoryMapEntry** map = stackalloc MemoryMapEntry*[1]; map[0] = &entry;
        NativeBootInfo boot = new() { MemoryEntries = map, MemoryEntryCount = 1 };
        NativeGpuDeviceDiscovery r = Valid();
        Program.Check("Pinned FSP register offset", NvidiaBootProbe.FspBootComplete == 0x00ad00bc);
        Accept("32-bit firmware BAR0 exact register page", &boot, &r, 0x90ad0000);
        r.Bar0.Address = 0x2000000000; r.Bar0.Flags |= GpuHardwareBridge.Width64;
        Accept("64-bit firmware BAR0 above4GiB", &boot, &r, 0x2000ad0000);
        r = Valid(); Deny("Probe null boot", null, &r); Deny("Probe null device", &boot, null);
        Program.Check("Probe null output rejected", !NvidiaBootProbe.TryRegisterPage(&boot, &r, null));
        r.Bar0.SizeSource = 0; Deny("Probe unknown BAR size denied", &boot, &r);
        r = Valid(); r.Bar0.SizeSource = 1; Deny("ReBAR alone not BAR0 firmware resource", &boot, &r);
        r = Valid(); r.Bar0.Size = 0; Deny("Probe zero aperture denied", &boot, &r);
        r = Valid(); r.Bar0.Size = 0x100000; Deny("Probe small aperture denied", &boot, &r);
        r = Valid(); r.Bar0.Size = 0xad0000 + 4095; Deny("Probe whole page must fit aperture", &boot, &r);
        r = Valid(); r.Bar0.Size = 0xc00000; Deny("Probe nonpower2 aperture denied", &boot, &r);
        r = Valid(); r.Bar0.Address += 4096; Deny("Probe base must align full aperture", &boot, &r);
        r = Valid(); r.Bar0.Address = 0x100000000; Deny("Probe 32-bit aperture above4GiB denied", &boot, &r);
        r = Valid(); r.Bar0.Address = 1UL << 52; r.Bar0.Flags |= GpuHardwareBridge.Width64;
        Deny("Probe physical limit denied", &boot, &r);
        r = Valid(); r.Bar0.Address = (1UL << 52) - 0x1000000; r.Bar0.Size = 0x2000000; r.Bar0.Flags |= GpuHardwareBridge.Width64;
        Deny("Probe aperture end beyond52bits denied", &boot, &r);
        foreach (uint flag in new[] { GpuHardwareBridge.Io, GpuHardwareBridge.UpperHalf, GpuHardwareBridge.Unassigned, GpuHardwareBridge.Invalid })
        {
            r = Valid(); r.Bar0.Flags |= flag; Deny("Probe unsafe BAR flags " + flag, &boot, &r);
        }
        r = Valid(); r.Bar0.Flags &= ~GpuHardwareBridge.SizeKnown; Deny("Probe size flag missing", &boot, &r);
        r = Valid(); r.Bar0.Index = 1; Deny("Probe BAR0 index mismatch", &boot, &r);
        r = Valid(); r.Bar0.Reserved = 1; Deny("Probe ABI reserved field nonzero", &boot, &r);
        r = Valid(); r.VendorId = 0x1234; Deny("Probe wrong vendor denied", &boot, &r);
        r = Valid(); r.DeviceId = 0x2b87; Deny("Probe wrong exact device denied", &boot, &r);
        r = Valid(); r.ClassCode = 0x020000; Deny("Probe wrong PCI class denied", &boot, &r);
        r = Valid(); r.HeaderType = 1; Deny("Probe bridge header denied", &boot, &r);
        r = Valid(); r.CapabilityStatus = 0; Deny("Probe no PCIe denied", &boot, &r);
        r = Valid(); r.Command = 4; Deny("Probe memory decoding disabled denied", &boot, &r);
        r = Valid(); r.AbiVersion = 2; Deny("Probe wrong ABI version denied", &boot, &r);
        r = Valid(); r.RecordBytes--; Deny("Probe wrong ABI size denied", &boot, &r);
        r = Valid(); r.Segment = 1; Deny("Probe unsupported PCI segment denied", &boot, &r);
        r = Valid(); r.Bus = 256; Deny("Probe invalid bus denied", &boot, &r);
        r = Valid(); r.Device = 32; Deny("Probe invalid slot denied", &boot, &r);
        r = Valid(); r.Function = 8; Deny("Probe invalid function denied", &boot, &r);
        r = Valid(); entry.Base = 0x90ad0000; entry.Length = 4096;
        foreach (ulong kind in new ulong[] { 0, 2, 3, 4, 5, 6, 7, 8, 99 })
        {
            entry.Kind = kind; Deny("Probe rejects RAM/GOP/firmware overlap kind " + kind, &boot, &r);
        }
        entry.Kind = 0; entry.Base += 4095; entry.Length = 1; Deny("Probe page lastbyte RAM overlap", &boot, &r);
        entry.Base = 0x90000000; entry.Length = 4096; Deny("Probe full BAR RAM overlap away from register", &boot, &r);
        entry.Base = 0x91000000; Accept("Probe adjacent RAM outside aperture allowed", &boot, &r, 0x90ad0000);
        entry.Base = 0x90ad0000; entry.Length = 0; Accept("Probe zero-length map entry ignored", &boot, &r, 0x90ad0000);
        entry.Base = ulong.MaxValue - 4; entry.Length = 8; Deny("Probe malformed overflowing map denied", &boot, &r);
        map[0] = null; Deny("Probe null memory entry denied", &boot, &r); map[0] = &entry;
        boot.MemoryEntryCount = 0; Deny("Probe empty map denied", &boot, &r);
        boot.MemoryEntryCount = 4097; Deny("Probe excessive map count denied", &boot, &r);
    }
}