using Cosmos.Kernel.HAL.DriverKit;
using Cosmos.Kernel.HAL.DriverKit.Buses.Pci;
using XFESystem.Core;

namespace XFESystem.Kernel;

/// <summary>
/// First native NVIDIA driver slice: copy assigned PCI resources using the owning bus.
/// It intentionally declines the device. No MMIO, DMA, firmware, power, reset, display,
/// or GPU channel writes are performed here; the bus restores firmware state on decline.
/// </summary>
[Driver(Feature = DriverFeature.Graphics)]
public sealed class NativeNvidiaDiscovery : Driver
{
    private readonly DeviceMatch[] matches = [new PciMatch(vendorId: 0x10DE, classCode: 0x03)];
    private static PciGpuDiscovery[] discoveries = [];
    public static ReadOnlySpan<PciGpuDiscovery> Discoveries => discoveries;
    public override string Name => nameof(NativeNvidiaDiscovery);
    public override ReadOnlySpan<DeviceMatch> Matches => matches;

    public override ProbeResult Probe(DeviceBinding binding)
    {
        if (binding.Node.Identity is not PciIdentity identity ||
            !binding.Node.TryGetAccess<PciAccess>(out var pci))
            return ProbeResult.Declined("No PCI identity or configuration access.");

        var bars = new PciGpuMemoryBar[pci.Bars.Length];
        for (int i = 0; i < bars.Length; i++)
        {
            var bar = pci.Bars[i];
            bars[i] = new(bar.Index, bar.IsAssigned, bar.IsIo, bar.Is64Bit,
                bar.IsPrefetchable, bar.Base, bar.Length);
        }
        var discovery = new PciGpuDiscovery(identity.Address, identity.VendorId, identity.DeviceId,
            identity.ClassCode, identity.Subclass, pci.FindCapability(0x10) != 0,
            pci.MessageInterruptCount, bars);
        // Probes run serially on the driver worker. Publish only a complete immutable
        // array, bounded independently of malformed or repeatedly arriving devices.
        var previous = discoveries;
        if (previous.Length < 8)
        {
            var next = new PciGpuDiscovery[previous.Length + 1];
            Array.Copy(previous, next, previous.Length);
            next[^1] = discovery;
            Volatile.Write(ref discoveries, next);
        }
        string resourceFailure = discovery.ValidateRegisterWindow();
        return ProbeResult.Declined(resourceFailure.Length == 0
            ? "PCI resources discovered; native GSP, GPU VM/channel, compute and CUDA driver are not implemented."
            : "PCI resource check failed: " + resourceFailure);
    }

    public static void Report(Action<string> write)
    {
        var snapshot = Volatile.Read(ref discoveries);
        write("XFE_NVIDIA_NATIVE_DISCOVERY|Count|" + snapshot.Length + "|CudaAcceleration|0|GpuRasterization|0\n");
        foreach (var device in snapshot)
        {
            write("XFE_NVIDIA_PCI|Address|" + device.Address + "|Vendor|" + device.VendorId.ToString("X4") +
                "|Device|" + device.DeviceId.ToString("X4") + "|Pcie|" + (device.PciExpress ? 1 : 0) +
                "|MsiXVectors|" + device.MessageInterruptCount + "|RegisterWindow|" +
                (device.ValidateRegisterWindow().Length == 0 ? "ValidGeometryOnly" : "Unavailable") + "\n");
            foreach (var bar in device.Bars)
                if (bar.IsAssigned)
                    write("XFE_NVIDIA_BAR|Address|" + device.Address + "|Index|" + bar.Index + "|Base|" +
                        bar.Address.ToString("X") + "|Length|" + bar.Length + "|Io|" + (bar.IsIo ? 1 : 0) +
                        "|Bits|" + (bar.Is64Bit ? 64 : 32) + "|Prefetch|" + (bar.IsPrefetchable ? 1 : 0) + "\n");
        }
    }
}