XFESystem

using System.Reflection;
using System.Runtime.InteropServices;
using XFESystem.Boot;
using XFESystem.NativeKernel;

internal sealed unsafe class FirmwareFixture : IDisposable
{
    public const ulong PhysicalBase = 0x100000, ArenaBytes = 65536, BarAddress = 0xC0000000, BarBytes = 16 * 1024 * 1024;
    private readonly byte* arena, control;
    public NativeBootInfo* Boot => (NativeBootInfo*)control;
    public byte* SystemTable => arena;
    public byte* ConfigArray => arena + 4096;
    public FirmwareGpuHandoff* Report => (FirmwareGpuHandoff*)(arena + 8192);
    public FirmwareGpuHandoff* SecondReport => (FirmwareGpuHandoff*)(arena + 12288);
    public MemoryMapEntry* Maps => (MemoryMapEntry*)(control + 256);
    public FirmwareGpuDevice* Device => (FirmwareGpuDevice*)Report->Devices;
    public FirmwareGpuBar* Bar0 => (FirmwareGpuBar*)Device->Bars;

    public FirmwareFixture()
    {
        ResetProduction(); Serial.Text.Clear();
        arena = (byte*)System.Runtime.InteropServices.NativeMemory.AlignedAlloc((nuint)ArenaBytes, 4096);
        control = (byte*)System.Runtime.InteropServices.NativeMemory.AlignedAlloc(4096, 4096);
        if (arena == null || control == null) throw new OutOfMemoryException();
        System.Runtime.InteropServices.NativeMemory.Clear(arena, (nuint)ArenaBytes);
        System.Runtime.InteropServices.NativeMemory.Clear(control, 4096);
        Boot->Hhdm = checked((ulong)arena - PhysicalBase);
        Boot->EfiSystemTable = (ulong)SystemTable;
        Boot->MemoryEntries = (MemoryMapEntry**)(control + 2048);
        for (int index = 0; index < 16; index++) Boot->MemoryEntries[index] = Maps + index;
        Boot->MemoryEntryCount = 1;
        Maps[0] = new() { Base = PhysicalBase, Length = ArenaBytes, Kind = 8 };
        U64(SystemTable, 0, 0x5453595320494249); U32(SystemTable, 8, 0x0002000C); U32(SystemTable, 12, 120);
        U64(SystemTable, 104, 1); U64(SystemTable, 112, Physical(ConfigArray));
        Config(0, Report);
        Report->Magic = FirmwareGpuHandoff.Signature; Report->Version = 1; Report->Bytes = FirmwareGpuHandoff.TotalBytes; Report->Count = 1;
        Device->Bus = 1; Device->VendorId = 0x10DE; Device->DeviceId = 0x2B85; Device->ClassCode = 0x030000; Device->Command = 3;
        byte* descriptor = stackalloc byte[48]; new Span<byte>(descriptor, 48).Clear();
        descriptor[0] = 0x8A; descriptor[1] = 43; descriptor[3] = 0; descriptor[46] = 0x79;
        U64(descriptor, 6, 32); U64(descriptor, 14, BarAddress); U64(descriptor, 22, BarBytes - 1); U64(descriptor, 38, BarBytes);
        if (!FirmwareGpuResources.DecodeBarDescriptor(descriptor, 48, 0, (uint)BarAddress, 0, Bar0)) throw new InvalidOperationException("The real firmware descriptor decoder rejected the valid fixture.");
        FixReportCrc(); FixSystemCrc();
    }
    public ulong Physical(void* pointer) => PhysicalBase + (ulong)((byte*)pointer - arena);
    public void Config(uint index, FirmwareGpuHandoff* report)
    {
        U64(ConfigArray, index * 24, FirmwareGpuHandoff.GuidLow); U64(ConfigArray, index * 24 + 8, FirmwareGpuHandoff.GuidHigh);
        U64(ConfigArray, index * 24 + 16, Physical(report));
    }
    public NativeGpuDeviceDiscovery Live()
    {
        uint* config = stackalloc uint[64]; new Span<uint>(config, 64).Clear();
        config[0] = 0x2B8510DE; config[1] = 3; config[2] = 0x030000A1; config[4] = (uint)BarAddress;
        NativeGpuDeviceDiscovery record;
        if (!GpuHardwareBridge.DecodeConfiguration(config, 64, &record)) throw new InvalidOperationException("The real PCI configuration decoder rejected the fixture.");
        record.Bus = 1; return record;
    }
    public static void ResetProduction()
    {
        const BindingFlags binding = BindingFlags.NonPublic | BindingFlags.Static;
        FieldInfo initialized = typeof(NativeGpuFirmware).GetField("_initialized", binding) ?? throw new MissingFieldException();
        FieldInfo report = typeof(NativeGpuFirmware).GetField("_report", binding) ?? throw new MissingFieldException();
        initialized.SetValue(null, false); report.SetValue(null, Pointer.Box(null, report.FieldType));
    }
    // Independent table-driven IEEE CRC32 fixture generator. Production parsers
    // remain linked verbatim and never generate their own expected checksum.
    public static uint Crc(ReadOnlySpan<byte> data, int zeroOffset = -1, int zeroBytes = 0)
    {
        uint* table = stackalloc uint[256];
        for (uint index = 0; index < 256; index++)
        {
            uint value = index;
            for (int bit = 0; bit < 8; bit++) value = (value >> 1) ^ ((value & 1) != 0 ? 0xEDB88320u : 0);
            table[index] = value;
        }
        uint crc = uint.MaxValue;
        for (int index = 0; index < data.Length; index++)
        {
            byte value = index >= zeroOffset && index < zeroOffset + zeroBytes ? (byte)0 : data[index];
            crc = table[(crc ^ value) & 255] ^ (crc >> 8);
        }
        return ~crc;
    }
    public void FixReportCrc() => Report->Checksum = Crc(new ReadOnlySpan<byte>(Report, (int)FirmwareGpuHandoff.TotalBytes), 24, 4);
    public void FixSystemCrc() => U32(SystemTable, 16, Crc(new ReadOnlySpan<byte>(SystemTable, 120), 16, 4));
    public static void U64(byte* target, uint offset, ulong value) => *(ulong*)(target + offset) = value;
    public static void U32(byte* target, uint offset, uint value) => *(uint*)(target + offset) = value;
    public void Dispose()
    {
        ResetProduction();
        System.Runtime.InteropServices.NativeMemory.AlignedFree(arena); System.Runtime.InteropServices.NativeMemory.AlignedFree(control);
    }
}